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<p>This typedef contains configuration information for the SDI TX core.  
 <a href="struct_x_v___sdi_tx_ss___config.html#details">More...</a></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a>
Data Fields</h2></td></tr>
<tr class="memitem:a919c6a7eb0a3a5d713811e906b4a5443"><td class="memItemLeft" align="right" valign="top">u16&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_v___sdi_tx_ss___config.html#a919c6a7eb0a3a5d713811e906b4a5443">DeviceId</a></td></tr>
<tr class="memdesc:a919c6a7eb0a3a5d713811e906b4a5443"><td class="mdescLeft">&#160;</td><td class="mdescRight">DeviceId is the unique ID of the SDI TX core.  <a href="#a919c6a7eb0a3a5d713811e906b4a5443">More...</a><br/></td></tr>
<tr class="separator:a919c6a7eb0a3a5d713811e906b4a5443"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac217e83b31add4264129e7350e1c90ed"><td class="memItemLeft" align="right" valign="top">UINTPTR&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_v___sdi_tx_ss___config.html#ac217e83b31add4264129e7350e1c90ed">BaseAddress</a></td></tr>
<tr class="memdesc:ac217e83b31add4264129e7350e1c90ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">BaseAddress is the physical base address of the subsystem address range.  <a href="#ac217e83b31add4264129e7350e1c90ed">More...</a><br/></td></tr>
<tr class="separator:ac217e83b31add4264129e7350e1c90ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a72ca093697f319824473603f7c7ff835"><td class="memItemLeft" align="right" valign="top">XVidC_PixelsPerClock&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_v___sdi_tx_ss___config.html#a72ca093697f319824473603f7c7ff835">Ppc</a></td></tr>
<tr class="memdesc:a72ca093697f319824473603f7c7ff835"><td class="mdescLeft">&#160;</td><td class="mdescRight">Supported Pixel per Clock.  <a href="#a72ca093697f319824473603f7c7ff835">More...</a><br/></td></tr>
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<tr class="memitem:a8b063f87848dcc0db6e975092f8789a3"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_v___sdi_tx_ss___config.html#a8b063f87848dcc0db6e975092f8789a3">InsertCSTRST352</a></td></tr>
<tr class="memdesc:a8b063f87848dcc0db6e975092f8789a3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Insert ST352 in C stream.  <a href="#a8b063f87848dcc0db6e975092f8789a3">More...</a><br/></td></tr>
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<tr class="memitem:aaf6f2c5fe1b6586f655957735539e72e"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_v___sdi_tx_ss___sub_core.html">XV_SdiTxSs_SubCore</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_v___sdi_tx_ss___config.html#aaf6f2c5fe1b6586f655957735539e72e">SdiTx</a></td></tr>
<tr class="memdesc:aaf6f2c5fe1b6586f655957735539e72e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sub-core instance configuration.  <a href="#aaf6f2c5fe1b6586f655957735539e72e">More...</a><br/></td></tr>
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<tr class="memitem:ad3bfb31c9e8cad01223a2d39080bf2d5"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_v___sdi_tx_ss___sub_core.html">XV_SdiTxSs_SubCore</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_v___sdi_tx_ss___config.html#ad3bfb31c9e8cad01223a2d39080bf2d5">Vtc</a></td></tr>
<tr class="memdesc:ad3bfb31c9e8cad01223a2d39080bf2d5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sub-core instance configuration.  <a href="#ad3bfb31c9e8cad01223a2d39080bf2d5">More...</a><br/></td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>This typedef contains configuration information for the SDI TX core. </p>
<p>Each SDI TX device should have a configuration structure associated. </p>
</div><h2 class="groupheader">Field Documentation</h2>
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<p>BaseAddress is the physical base address of the subsystem address range. </p>

<p>Referenced by <a class="el" href="xsdi__example_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>, <a class="el" href="group__v__sditxss.html#ga2b21d762f221a77fcb9b345149c7cd78">SdiTxSs_SelfTestExample()</a>, <a class="el" href="xv__sditxss_8h.html#a4bdb55bb1af5300e000e420e35256eb8">XV_SdiTxSs_CfgInitialize()</a>, <a class="el" href="group__v__sditxss.html#ga947c864c39e22328573d30b2cd0f4ca3">XV_SdiTxSs_SubcoreInitSdiTx()</a>, and <a class="el" href="group__v__sditxss.html#ga014e94de29a924cc95a2282fe8abf748">XV_SdiTxSs_SubcoreInitVtc()</a>.</p>

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          <td class="memname">u16 XV_SdiTxSs_Config::DeviceId</td>
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<p>DeviceId is the unique ID of the SDI TX core. </p>

<p>Referenced by <a class="el" href="xv__sditxss_8h.html#a4bdb55bb1af5300e000e420e35256eb8">XV_SdiTxSs_CfgInitialize()</a>.</p>

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          <td class="memname">u8 XV_SdiTxSs_Config::InsertCSTRST352</td>
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<p>Insert ST352 in C stream. </p>

<p>Referenced by <a class="el" href="xv__sditxss_8h.html#ac6a4e5af042d945efa96a2d510c08a4b">XV_SdiTxSs_ST352CStreamEnable()</a>, and <a class="el" href="xv__sditxss_8h.html#a8b2b3cc3de317fdcd41dabf6dd330c60">XV_SdiTxSs_ST352CSwitch3GA()</a>.</p>

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<p>Supported Pixel per Clock. </p>

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          <td class="memname"><a class="el" href="struct_x_v___sdi_tx_ss___sub_core.html">XV_SdiTxSs_SubCore</a> XV_SdiTxSs_Config::SdiTx</td>
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<p>Sub-core instance configuration. </p>

<p>Referenced by <a class="el" href="group__v__sditxss.html#ga947c864c39e22328573d30b2cd0f4ca3">XV_SdiTxSs_SubcoreInitSdiTx()</a>.</p>

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<p>Sub-core instance configuration. </p>

<p>Referenced by <a class="el" href="group__v__sditxss.html#ga014e94de29a924cc95a2282fe8abf748">XV_SdiTxSs_SubcoreInitVtc()</a>.</p>

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